Digital Physical Design Engineer - Edinburgh


Premium Job From IC Resources

Recruiter

IC Resources

Listed on

1st January 2017

Location

Edinburgh

Salary/Rate

Competitive Salary - D.O.E

Salary Notes

Competitive Salary - D.O.E

Type

Permanent

Start Date

ASAP

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Digital Physical Design Engineer - Scotland

We are seeking a Digital Physical Design Engineer to join our Edinburgh-based Semiconductor client; one of the world's top developers of ICs for the automotive, industrial and consumer electronic markets.

To support their continued growth, they are looking to recruit a skilled Physical Design Engineer to join their ASIC design team developing a new generation of mixed-signal motor control ASICs. As a key member of a small team of backend design experts within this team, you will take responsibility for the complete physical design activity including, but not limited to:

-Defining test requirements and insert scan logic.

-Synthesis and place and route (P&R)

-Floorplanning, clock tree insertion, timing optimization and static timing analysis (STA).

-Physical verification

-Automatic test pattern generation and vector verification.

Key requirements:

-A University degree in Electronics, or related field

-Sound knowledge of Synthesis, Floor-planning, Place and Route (P&R), Clock Tree Synthesis (CTS) Static Timing Analysis (STA), Timing Closure

-Some prior industrial experience working on the digital backend flow; our client is open upon seniority level for the right candidate

-An organised and analytical working style with a methodical approach

-Excellent communication skills in English

You are looking for an exciting new Physical Design opportunity offering high technical challenge, enjoyable working environment, and good growth prospects, contact us today for more details.

A global company, our client offers a competitive salary and suite of benefits including pension scheme, private medical insurance, and profit sharing scheme.

Candidates must be eligible to work within the EU to be considered for this role.

Key words: Digital, Physical Design, Backend, IC, ASIC, RTL-GDSII, floorplanning, Place & Route, P&R, STA, Static Timing Analysis, CTS, Clock Tree Synthesis, timing closure, Cadence, Synopsys, Scotland, Edinburgh, UK.

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