Design Verification Engineer - FPGA / ASIC - Scotland

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Design Verification Engineer - FPGA / ASIC

Edinburgh, Scotland

salary commensurate with experience

From their offices in Edinburgh, my client is a leading provider of hardware IP functions for cutting-edge wired and wireless communication systems in next generation FPGAs. Fuelled by exceptional business levels, and as part of a wide expansion programme, they are seeking a Design Verification Engineer to join their team.

You will be joining an experienced team, and you should have experience in the following areas :-

. FPGA or ASIC verification with SystemVerilog and UVM

. Test plan development and functional coverage analysis

. RTL synthesis

. Experience of wired communications or FEC beneficial

. FPGA hardware prototyping experience beneficial

The role is best suited to an early stage engineering professional, or a new graduate with particularly relevant practical experience.

Contact Dave at IC Resources to find out more and to apply.

Key skills: Verification, Engineer, DV, RTL, FPGA, ASIC, IP, Verilog, VHDL, SystemVerilog, UVM, Edinburgh, Scotland, UK